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• Family Name: STM8L
• Core Processor: STM8
• Program Memory Type: ROM
• Flash Size (Bytes): 16 kB
• RAM Size: 2 kB
• Speed: 16 MHz
• No of I/O Lines: 30
• InterfaceType / Connectivity:I2C / SPI / USART
• Peripherals: On-Chip-DAC / On-Chip-ADC / I2C / SPI / USART / Watchdog / PWM / Analog Comparators
• Number Of Timers: 4
• Supply Voltage: 1.8 to 3.6 V
• Operating Temperature: -40 to +85 °C
• On-Chip ADC: 22-chx12-bit
• On-Chip DAC: 1-chx12-bit
• Watchdog: 2

STM8L151K4T6此產(chǎn)品不能運往到歐洲。

The STM8L151K4T6 device is a member of the STM8L Ultralow power 8-bit family. The STM8L15xxx family operates from 1.8 V to 3.6 V (down to 1.65 V at power down) and is available in the -40 to +85 °C and -40 to +125 °C temperature ranges.

The STM8L151K4T6 Ultralow power family features the enhanced STM8 CPU core providing increased processing power (up to 16 MIPS at 16 MHz) while maintaining the advantages of a CISC architecture with improved code density, a 24-bit linear addressing space and an optimized architecture for low power operations.

STM8L151K4T6 Features:

• Operating conditions
  • Operating power supply range 1.8 V to 3.6 V (down to 1.65 V at power down)
  • Temperature range: - 40 °C to 85 or 125 °C
• Low power features
  • 5 low power modes: Wait , Low power run (5.1 μA), Low power wait (3 μA), Active-halt with full RTC (1.3 μA), Halt (350 nA)
  • Dynamic consumption: 195 μA/MHz+440 μA
  • Ultralow leakage per I/0: 50 nA
  • Fast wakeup from Halt: 4.7 μs
• Advanced STM8 core
  • Harvard architecture and 3-stage pipeline
  • Max freq. 16 MHz, 16 CISC MIPS peak
  • Up to 40 external interrupt sources
• Reset and supply management
  • Low power, ultrasafe BOR reset with 5 selectable thresholds
  • Ultralow power POR/PDR
  • Programmable voltage detector (PVD)
• Clock management
  • 1 to 16 MHz crystal oscillator
  • 32 kHz crystal oscillator
  • Internal 16 MHz factory-trimmed RC
  • Internal 38 kHz low consumption RC
  • Clock security system
• Low power RTC
  • BCD calendar with alarm interrupt
  • Auto-wakeup from Halt w/ periodic interrupt
• LCD: up to 4x28 segments w/ step-up converter
• Memories
  • Up to 32 KB of Flash program memory and 1 Kbyte of data EEPROM with ECC, RWW
  • Flexible write and read protection modes
  • Up to 2 Kbytes of RAM
• DMA
  • 4 channels; supported peripherals: ADC, DAC, SPI, I2C, USART, timers
  • 1 channel for memory-to-memory
• 12-bit DAC with output buffer
• 12-bit ADC up to 1 Msps/25 channels
  • T. sensor and internal reference voltage
• 2 Ultralow power comparators
  • 1 with fixed threshold and 1 rail to rail
  • Wakeup capability
• Timers
  • Two 16-bit timers with 2 channels (used as IC, OC, PWM), quadrature encoder
  • One 16-bit advanced control timer with 3 channels, supporting motor control
  • One 8-bit timer with 7-bit prescaler
  • 2 watchdogs: 1 Window, 1 Independent
  • Beeper timer with 1, 2 or 4 kHz frequencies
• Communication interfaces
  • Synchronous serial interface (SPI)
  • Fast I2C 400 kHz SMBus and PMBus
  • USART (ISO 7816 interface and IrDA)
• Up to 41 I/Os, all mappable on interrupt vectors
• Up to 16 capacitive sensing channels with free firmware
• Development support
  • Fast on-chip programming and non intrusive debugging with SWIM
  • Bootloader using USART
• 96-bit unique ID